In many applications a power converter is required to provide a voltage within a predetermined range formed from a voltage source having a different voltage level. Some circuits are subject to uncertain and undesirable functioning and even irreparable damage if supplied power falls outside a certain range. More specifically, in some applications, a precise amount of power is required at known times. This is referred to as regulated power supply.
In order to control a power converter to deliver a precise amount of power as conditions require, some form of control of the power converter is required. This control can occur on the primary side of an isolation transformer or the secondary side. A closed loop feedback control system is a system that monitors some element in the circuit, such as the circuit output voltage, and its tendency to change, and regulates that element at a substantially constant value. Control on the secondary side of a power converter can use a monitored output voltage as feedback control, but requires the use of some communication from the secondary to the primary side of the isolation transformer to control the primary side switching element. Control on the primary side can readily control the primary side switching element, but requires some feedback mechanism from the secondary side to the primary side to convey the status of the monitored element.
FIG. 1 illustrates a conventional flyback type voltage converter. The converter 10 includes a transistor T1, a controller 14, a transformer 12, a capacitor C1, and a diode D1. Input voltage to the circuit may be unregulated DC voltage derived from an AC supply after rectification and filtering. The transistor T1 is a fast-switching device, such as a MOSFET, the switching of which is controlled by a fast dynamic controller 14 to maintain a desired regulated output voltage Vout. The secondary winding voltage is rectified and filtered using the diode D1 and the capacitor C1. The transformer 12 of the flyback converter functions differently than a typical transformer. Under load, the primary and secondary windings of a typical transformer conduct simultaneously. However, in the flyback converter, the primary and secondary windings of the transformer do not carry current simultaneously. In operation, when the transistor T1 is turned ON, the primary winding P1 of the transformer 12 is connected to the input supply voltage such that the input supply voltage appears across the primary winding P1, resulting in an increase of magnetic flux in the transformer 12 and the primary winding current rises linearly. However, with the transistor T1 turned ON, the diode D1 is reverse biased and there is no current through the secondary winding S1. Even though the secondary winding S1 does not conduct current while the transistor T1 is turned ON, the load, represented as resistor Rload, coupled to the capacitor C1 receives uninterrupted current due to previously stored charge on the capacitor C1.
When the transistor T1 is turned OFF, the primary winding current path is broken and the voltage polarities across the primary and secondary windings reverse, making the diode D1 forward biased. As such, the primary winding current is interrupted but the secondary winding S1 begins conducting current thereby transferring energy from the magnetic field of the transformer to the output of the converter. This energy transfer includes charging the capacitor C1 and delivery energy to the load. If the OFF period of the transistor T1 is sufficiently long, the secondary current has sufficient time to decay to zero and the magnetic field energy stored in the transformer 12 is completely dissipated.
To regulate the output voltage Vout, the output voltage or some representation of the output voltage, is provided to the controller 14. The controller 14 regulates a duty cycle of a pulse width modulation (PWM) signal used to drive the main switch, the transistor T1. The output voltage Vout is regulated by adjusting the duty cycle of the PWM signal.
A significant consideration of power converter design is to minimize power consumption under no load condition. This is typically achieved by putting the power converter into a low power mode, often referred to as a standby mode or a sleep mode, when a no load condition is detected. In normal operation, the main switch is turned ON and OFF at a high switching rate under control of the controller to maintain the regulated output voltage Vout. In sleep mode, the power converter operates in a burst mode. The PWM signal drives the main switch ON and OFF for a brief period, such as a few microseconds, followed by a longer period of inactivity where the main switch is turned OFF, such as for a few milliseconds. As shown in FIG. 2, during periods of inactivity, the output voltage Vout decays until it reaches a threshold value Vt, which represents a minimum operational voltage, at which point the power converter is active (time tburst) to deliver power to the output, thereby increasing the output voltage Vout back to the normal regulated value. Once the output voltage Vout increases to the desired level, such as the regulated voltage, the power converter resumes its inactive status, at time tinactive in FIG. 2.
When a load is connected while the controller is in sleep mode, the load draws from the output capacitor, thereby depleting the capacitor because the sleep mode is only providing short duration bursts of power. The initial response to the connected load is to sink a large amount of voltage which results in a drop of the output voltage that is supposed to be regulated. The controller requires some period of time to come out of sleep mode, but during this time period the connected load draws down the output voltage Vout below the threshold voltage Vt, as shown in FIG. 3. With the output voltage Vout below the threshold voltage, the voltage is out of regulation and the connected load determines insufficient power and shuts down or provides an error message. This is a deficiency of the sleep mode of operation. In conventional power converters, to keep the output voltage in regulation under transition from sleep mode to wake-up, an excessive output capacitor is required to keep output voltage form sinking below the threshold voltage Vt, which presents a huge inertia to the transient response.